AHA: Automated Hardware Abstraction in Operating-System Engineering (DFG: LO 1719/4-1)

Operating systems have always served the purpose to abstract and complement the capabilities of the underlying hardware. Conceptually, the operating system generalizes and expands the instruction set of the machine by partial interpretation and multiplexing of hardware resources. It simplifies the development and portability of applications by hiding the hardware from the application developer.

The price for abstraction and generalization are inefficiencies (with regard to storage requirements, energy requirements, eventuality, predictability, security, etc.) for the concrete application: The power of the generalized concepts is not fully used – but still provided. Hardware resources are virtualized by multiplexing – even in cases a direct mapping would be possible. Even in the OS implementation itself, the hardware is often not used directly, but again accessed via a further, partially interpreting hardware abstraction layer.

Our goal with AHA (Automated Hardware Abstraction in Operating System Design) is to improve nonfunctional properties of system software by a very deep, but fully automated specialization of the application-hardware bridge represented by the operating system. We want to investigate, how more directly mapped implementation variants of the "same" OS functionality – which are semantically equivalent (only) for a particular application – can be generated fully automatically from analyzing this application and its specific interactions with the operating system.

In the context of AHA, "Application" and "operating system functionality" covers the domain of embedded special purpose systems (automotive control unit, IoT device, embedded server node ...); "Hardware" stands for commercial-of-the-shelf platforms (Infineon AURIX, ARM, ...) using their specific characteristics as well as for completely application-specific processor hardware (such as RISC-V). In an extreme case, the specific operating-system functionality required by a particular application is instantiated directly into the command set and pipeline of the processors.

The application developer can – transparently – select among different specialization stages: from "classic" software-based specialization over application-/hardware-specific specialization on standard hardware up to the specialization of the hardware itself to cover the actually needed operating-system extensions.

The basic research question we want to answer with AHA is: What is the highest possible degree of application- and hardware-specific specialization and generalization of system software? Which efficiency gains can be achieved at what cost by problem-specific specialization, on the premise that the process of specialization can be performed completely automatically?

People

Latest News

2023-05-12 Static Syscall Elision and Specialization for Event-Triggered Multi-Core RTOS at RTAS '23

Gerion Entrup presents our paper MultiSSE: Static Syscall Elision and Specialization for Event-Triggered Multi-Core RTOS at the 29th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS '23) in San Antonio, Tx, USA. In the paper we present MultiSSE, and extension of our SSE approach for RTOS-aware whole-program analyses to multi-core systems. Such systems are generally considered intractable for flow-sensitive analyses, as the number of possible system states rises exponentially with the number of cores. However, MultiSSE exploits structural and optional timing information to analyze the core-level control flows as independently as possible from each other, synchronizing their states only when necessary. Thereby, MultiSSE provides means to realize compile-time deadlock detection, lock elision and system-call optimization also on multi-core systems. This is an important building block for the AHA project.

2022-07-05 RTOS-Independent Interaction Analysis in ARA at OSPERT '22

Gerion Entrup presents our paper RTOS-Independent Interaction Analysis in ARA at the 16th Workshop on Operating System Platforms for Embedded Real-Time Applications (OSPERT '22) in Modena. In the paper we describe our approach towards RTOS-independent interaction analyses in the ARA framework that makes ARA analyses compatible with many RTOS standards, among them AUTOSAR OS, FreeRTOS and POSIX. The ARA OS model is an important building block towards our goal of fully automatic application analysis in the AHA project.

More news...

Publications

RTSJ Journal
Applied static analysis and specialization of cross-core syscalls for multi-core AUTOSAR OS
Gerion Entrup, Andreas Kässens, Björn Fiedler, Daniel LohmannReal-Time SystemsSpringer2024.
PDF 10.1007/s11241-024-09429-1 [BibTex]
RTAS Conference A
MultiSSE: Static Syscall Elision and Specialization for Event-Triggered Multi-Core RTOS
Gerion Entrup, Björn Fiedler, Daniel LohmannProceedings of the 29th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'23)2023.
PDF Details Slides [BibTex]
Thesis
Anwendungsgewahre statische Spezialisierung vormals dynamischer Systemaufrufe zur Verbesserung nichtfunktionaler Eigenschaften eingebetteter Echtzeitsysteme
Björn Fiedler PHD thesisLeibniz Universität Hannover2023.
PDF 10.15488/13945 [BibTex]
OSPERT Workshop B
RTOS-Independent Interaction Analysis in ARA
Gerion Entrup, Jan Neugebauer, Daniel LohmannProceedings of the 16th Annual Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT '22)2022.
PDF Slides [BibTex]
ISORC Conference C Outstanding Paper Award
PSIC: Priority-Strict Multi-Core IRQ Processing
Malte Bargholz, Christian Dietrich, Daniel LohmannProceedings of the 25th International Symposium on Real-Time Distributed ComputingIEEE Computer Society2022Outstanding Paper Award.
PDF Slides 10.1109/ISORC52572.2022.9812796 [BibTex]
RTAS Conference A
ARA: Static Initialization of Dynamically-Created System Objects
Björn Fiedler, Gerion Entrup, Christian Dietrich, Daniel LohmannProceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'21)2021.
PDF Details Video Teaser Video 10.1109/RTAS52030.2021.00039 [BibTex]
OSPERT Workshop B
ARA: Automatic Instance-Level Analysis in Real-Time Systems
Gerion Entrup, Benedikt Steinmeier, Christian DietrichProceedings of the 15th Annual Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT '19)2019.
PDF [BibTex]
RTSS Conference A*
RT.js: Practical Real-Time Scheduling for Web Applications
Christian Dietrich, Stefan Naumann, Robin Thrift, Daniel LohmannProceedings of the 40th IEEE Real-Time Systems Symposium 2019IEEE Computer Society Press2019.
PDF 10.1109/RTSS46320.2019.00017 [BibTex]
OSPERT Workshop B Best Paper Award
Levels of Specialization in Real-Time Operating Systems
Björn Fiedler, Gerion Entrup, Christian Dietrich, Daniel LohmannProceedings of the 14th Annual Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT '18)2018Best Paper Award.
PDF [BibTex]
RTSS Conference A*
Semi-Extended Tasks: Efficient Stack Sharing Among Blocking Threads
Christian Dietrich, Daniel LohmannProceedings of the 39th IEEE Real-Time Systems Symposium 2018IEEE Computer Society Press2018.
PDF Details Slides Raw Data 10.1109/RTSS.2018.00049 [BibTex]
ECRTS Conference A Outstanding Paper Award
Whole-System Worst-Case Energy-Consumption Analysis for Energy-Constrained Real-Time Systems
Peter Wägemann, Christian Dietrich, Tobias Distler, Peter Ulbrich, Wolfgang Schröder-PreikschatProceedings of the 30th Euromicro Conference on Real-Time Systems 2018Schloss Dagstuhl–Leibniz-Zentrum fuer Informatik2018Outstanding Paper Award.
PDF 10.4230/LIPIcs.ECRTS.2018.24 [BibTex]
FMCAD Conference
Automatic Verification of Application-Tailored OSEK Kernels
Hans-Peter Deifel, Christian Dietrich, Merlin Göttlinger, Daniel Lohmann, Stefan Milius, Lutz SchröderProceedings of the 17th Conference on Formal Methods in Computer-Aided Design (FMCAD '17)ACM Press2017.
PDF 10.23919/FMCAD.2017.8102260 [BibTex]
LCTES Conference A
OSEK-V: Application-Specific RTOS Instantiation in Hardware
Christian Dietrich, Daniel LohmannProceedings of the 2017 ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems (LCTES '17)ACM Press2017.
PDF Raw Data 10.1145/3078633.3078637 [BibTex]
TECS Journal A
Global Optimization of Fixed-Priority Real-Time Systems by RTOS-Aware Control-Flow Analysis
Christian Dietrich, Martin Hoffmann, Daniel LohmannACM Transactions on Embedded Computing Systems16.2ACM Press2017.
PDF Raw Data 10.1145/2950053 [BibTex]
ESE Invited Talk
SysWCET: Ende-zu-Ende-Antwortzeiten für OSEK-Systeme
Christian Dietrich, Peter WägemannTagungsband des Embedded Software Engineering Kongress 20172017.
PDF Slides [BibTex]
RTAS Conference A Outstanding Paper Award
SysWCET: Whole-System Response-Time Analysis for Fixed-Priority Real-Time Systems
Christian Dietrich, Peter Wägemann, Peter Ulbrich, Daniel LohmannProceedings of the 23rd IEEE International Symposium on Real-Time and Embedded Technology and Applications (RTAS '17)IEEE Computer Society Press2017Outstanding Paper Award.
PDF Raw Data 10.1109/RTAS.2017.37 [BibTex]

Theses

Currently Running

Controlling the Kite: Static Control-Flow System Analysis for Embedded Controllers with Zephyr RTOS in ARA

The ARA toolchain shall support the system-state enumeration for Zephyr-based embedded applications.

 
Typ
Masterarbeit

 
Status
laufend

 
Supervisors
Andreas Kässens
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Vitali Fendel

Development and Analysis of an AUTOSAR Real-Time Operating System on a Multicore RISC-V Hardware Platform

In previous work, an AUTOSAR-compatible real-time operating system was developed for RISC-V in QEMU. In this thesis, it shall be deployed on real RISC-V hardware like the BeagleV®-Fire so timing measurements for RTOS-specific optimizations can be executed.

 
Typ
Bachelorarbeit

 
Status
reserviert

 
Supervisors
Andreas Kässens
Daniel Lohmann

Experimental Setup of an Active Magnetic Bearing for Real-Time Operating System Research

For optimization of RTOS, an experimental setup to prove the applicability for real world systems shall be built.

 
Typ
Studienarbeit

 
Status
reserviert

 
Supervisors
Andreas Kässens
Daniel Lohmann

Interaction-Level Specialization of RISC-V Soft Cores for Zephyr RTOS with ARA

The specialization of Real-Time operating systems can be extended to the hardware. Using a RISC-V Soft Core, tailored hardware for the Zephyr RTOS shall be implemented.

 
Typ
Masterarbeit

 
Status
reserviert

 
Supervisors
Andreas Kässens
Daniel Lohmann

RTOS of the Day: Performance Comparison and Analysis of Open Source Real-Time Operating Systems

For optimization of RTOS, we need a performance measurement baseline. RTOS-specific benchmarks like ThreadMetric can provide numbers on how some implementations are more or less suitable for time-critical applications.

 
Typ
Bachelorarbeit

 
Status
laufend

 
Supervisors
Andreas Kässens
Daniel Lohmann

 
Bearbeiter
Jan Heinemeyer

Finished Theses

InterSloth: Globales Hardware-gesteuertes Scheduling in einem Multikern-Echtzeitbetriebssystem auf RISC-V

[PDF]

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Christian Dietrich
Daniel Lohmann

 
Bearbeiter
Malte Bargholz (abgegeben: 09. Aug 2018)

Integration of a Priority-Obedient Interrupt Controller into the Rocket Softcore


 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Christian Dietrich
Daniel Lohmann

 
Bearbeiter
Matthias Wolf (abgegeben: 01. Nov 2018)

Analyzing and Optimizing TLB-Induced Thread Migration Costs on Linux/ARM


 
Typ
Masterarbeit

 
Status
abgeschlossen

 
Supervisors
Björn Fiedler
Christian Dietrich
Daniel Lohmann

 
Bearbeiter
Tobias Landsberg (abgegeben: 21. Nov 2018)

Automatic Real-Time System Analysis


 
Typ
Masterarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Benedikt Steinmeier (abgegeben: 06. Mar 2019)

Measuring Effects of Compiler Flags on Different Processor Architectures


 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Florian Rommel
Daniel Lohmann

 
Bearbeiter
Carlo Schmitt (abgegeben: 21. Mar 2019)

Accelerate Micropython: Developing Accelerators for Micropython on the RISC-V platform

Benchmark Micropython, identify spots to accelerate and propose hardware accelerators for the Micropython interpreter.

 
Typ
Masterarbeit

 
Status
abgeschlossen

 
Supervisors
Stefan Naumann
Daniel Lohmann

Automatische Generierung statistisch spezialisierter FreeRTOS-Kerne mit LLVM

A compile-time generator for static FreeRTOS system objects

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Björn Fiedler
Daniel Lohmann

 
Bearbeiter
Jonas Hollmann

Investigating Microarchitectural Effects on Code Optimization for Specific Processor Models

Research the effects of compiler optimization flags on different processor architectures and their impact on the code being executed.

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Stefan Naumann
Daniel Lohmann

 
Bearbeiter
Vitali Fendel

Statische Instanziierung von FreeRTOS Systemobjekten zur Verbesserung nichtfuntionaler Eigenschaften mit dem ARA Codegenerator Framework

A compile-time generator for static FreeRTOS system objects

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Björn Fiedler
Daniel Lohmann

Idealer Gebrauch von LLVM-Optimierungstechniken zur Verbesserung statischer Analyse von Echtzeitsystemen

Extend ARA - a tool for static (real-time) operating system analysis - to use as much already implemented LLVM analyses as possible

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Manuel Breiden (abgegeben: 19. Apr 2020)

MultiSSE: Full Static Emulation of a Multicore System at the example of AUTOSAR RTOS

Extend the System-State Enumeration, an real-time systems analysis technique, to support multiple cores and show the working with an implementation in ARA.

 
Typ
Masterarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Fredo Nowak (abgegeben: 24. Dec 2020)

Compile-Time Malloc: Static Analysis and Replacement of Formerly Dynamic Memory Allocations using LLVM and the ARA Framework.

Move all statically analyzable allocations into compile-time.

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Björn Fiedler
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Christoph Möller

Effizientes Laden dünn besetzter Datenstrukturen auf eingebetteten Systemen

Introduction of Sparse Data Segments for Embedded Systems

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Björn Fiedler
Daniel Lohmann

 
Bearbeiter
Jannis Thöle

Design und Implementierung eines Zephyr-RTOS-Modells für ARA zur statischen Whole-System-Analyse

Extend ARA - a (real-time) operating system (RTOS) analyzer - for analysis of Zephyr, an RTOS guided by the Linux Foundation

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Kenny Albes (abgegeben: 28. Feb 2021)

Whole-Program Analysis of POSIX/Linux-Applications: Design and Implementation of an Operating-System Model

Extend ARA - a (real-time) operating system analyzer - for analysis of POSIX, which enables the analysis of Linux applications.

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Jan Neugebauer (abgegeben: 29. Jul 2021)

Fixed-Point Analysis in SVF: Iterative Value Flow Graph Construction

Extent ARA's value analysis to pointers, conditions and loops.

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

System Calls as Prepared Statements: Extend ARA to Precompute Interaction System Calls

Extend the ARA to precompute interaction system calls like queue.send(data).

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Björn Fiedler
Daniel Lohmann

 
Bearbeiter
Lukas Berg (abgegeben: 20. Sep 2021)

Source-to-source Transformation with Clang: Traversing the AST to Uniquely Identify and Mark C++ Macros

Extend the C preprocessor with automatic function markers that are usable in ARA

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

ARA in the wild: Systematic Application and Evaluation of ARA as a Whole-System Optimizer on Real-World Applications

ARA is a whole system analyzer and optimizer. This thesis should investigate in an empirical study about the improvements derived from ARA's specializations.

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Björn Fiedler
Daniel Lohmann

Meson Language Design: Construction and Automatic Checking of a Meson-Object Classification

Develop a classification for the Meson domain specific language and to tool to check for it

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Paul Aumann

Slothful Bird: Extend the ARA System Generator by a Sloth Backend for FreeRTOS and OSEK

Extend the ARA Generator with a backend using the interrupt controller as scheduler and dispatcher.

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Björn Fiedler
Daniel Lohmann

Bringing Light into the Dark: Interactive Graph Visualization of Static Analyses for Real-Time Operating Systems

Extend the analyses steps of ARA with a multi step visualization

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

Let ARA Fly Fast: Optimizing an LLVM-Based Whole-System Optimizer for Embedded Real-Time Systems via Systematic Profiling

Make ARA fast. How fast? Really fast with profiling and performance tuning.

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

Mindstorming with Erika: Porting an OSEK/AUTOSAR conform operating system to ARM9


 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Tim-Marek Thomas
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Jasper Lorenz (abgegeben: 09. Sep 2022)

Evaluation and Adaptation of an LLVM-Based Whole-System-Compiler for Optimizing Embedded RISC-V/ARM Systems

Evaluate ARA's FreeRTOS optimizations on IronOS and InfiniTime and test in on real hardware.

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Tobias Landsberg
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Domenik Kuhn (abgegeben: 26. Sep 2022)

Design and Implementation of an OSEK-Conform Hard Real-Time Application Using LEGO Mindstorms EV3


 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Björn Fiedler
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Barbara Seidl (abgegeben: 18. Mar 2023)

Configurable Depth Analysis: Create a meta analysis to statically analyze a system in different depths

Orchestrate different existing static analysis techniques to analyze a real-time system in different depths and show the working with an implementation in ARA.

 
Typ
Masterarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

Crossing the red light: Locks that never lock don't have to be taken.

Implement and evaluate an AUTOSAR synthesis with Lock Elision [PDF]

 
Typ
Masterarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

 
Bearbeiter
Andreas Kässens (abgegeben: 14. Jun 2023)

De-slacking MultiSSE: Improving Timing Analysis and Code Synthesis in ARA, an LLVM-Based Whole-System Compiler for Multi-Core Real-Time Systems

Reduce the slack to make the MultiSSE capable of analyzing large systems and manifest that time also in a synthezised image.

 
Typ
Masterarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Björn Fiedler
Daniel Lohmann

Generic Metadata Transport of High-Level–Language Properties between LLVM-Compiler Front and Middle End for Static Analysis

Extract Token or AST information from Clang that are useful for static analysis and transfer it into the Middleend.

 
Typ
Masterarbeit

 
Status
abgeschlossen

 
Supervisors
Gerion Entrup
Daniel Lohmann

Implementation of Optimized AUTOSAR Systems for RISC-V with ARA

Extending the AUTOSAR Synthesis in ARA to support multicore RISC-V targets

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Andreas Kässens
Daniel Lohmann

 
Bearbeiter
Arved Blöcker (abgegeben: 05. Aug 2024)

On the Power Estimation of a RISC-V Platform using Performance Monitoring Counters and RTOS Events

Build an evaluation setup with the aim to create an power model for a RISC-V platform [PDF]

 
Typ
Bachelorarbeit

 
Status
abgeschlossen

 
Supervisors
Tim-Marek Thomas
Daniel Lohmann

 
Bearbeiter
Johannes Arnold (abgegeben: 14. Oct 2024)