Running Theses

Using the ARA Framework to Generate a FreeRTOS Compatible Kernel

Typ: Bachelorarbeit
Status: reserviert
Supervisors: Björn Fiedler, Daniel Lohmann
Project: AHA
A compile-time generator for static FreeRTOS system objects

FreeRTOS Instance Level Specialization - Static Generation of System Objects

Typ: Bachelorarbeit
Status: laufend
Supervisors: Björn Fiedler, Daniel Lohmann
Project: AHA
A compile-time generator for static FreeRTOS system objects

Use LLVM Compiler Optimization Techniques in ARA

 
Typ: Bachelorarbeit
Status: reserviert
Supervisors: Gerion Entrup, Daniel Lohmann
Project: AHA
Extend ARA - a tool for static (real-time) operating system analysis - to use as much already implemented LLVM analyses as possible

Bring Support for Zephyr Analysis to ARA

 
Typ: Bachelorarbeit
Status: reserviert
Supervisors: Gerion Entrup, Daniel Lohmann
Project: AHA
Extend ARA - an (real-time) operating system (RTOS) analyzer - for analysis of Zeyphr, an RTOS guided by the Linux Foundation

Investigating Microarchitectural Effects on Code Optimization for Specific Processor Models

Typ: Bachelorarbeit
Status: laufend
Supervisors: Stefan Naumann, Daniel Lohmann
Project: AHA
Bearbeiter: Vitali Fendel
Research the effects of compiler optimization flags on different processor architectures and their impact on the code being executed.

Explicit Harts: Empowering the OS to Control Hardware Threads

Typ: Masterarbeit
Status: reserviert
Supervisors: Björn Fiedler, Daniel Lohmann
Project: AHA
Currently the CPU decides in case of hardware multithreading which thread gets executed by the pipeline. This thesis investigates benefits of giving explicit control over this decision to the operating system.

Acceleration of Fault-Injection Campaigns through Early Timeout Detection

Typ: Masterarbeit
Status: laufend
Supervisors: Oskar Pusz, Daniel Lohmann
Bearbeiter: Felix Siegel
Developing methods to avoid unnecessary fault-injection campaign run time

Schotbruch: Automatisierte Ableitung von Injektionsplattformen für transiente Hardwarefehler aus formalen Prozessormodellen

Typ: Masterarbeit
Status: laufend
Supervisors: Christian Dietrich, Oskar Pusz, Daniel Lohmann
Bearbeiter: Marcel Budoj
Use SAIL language to integrate an ISA implementations into a fault injection framework. Different CPU architectures shall be evaluated for reliability.

Accelerate Micropython: Developing Accelerators for Micropython on the RISC-V platform

Typ: Masterarbeit
Status: laufend
Supervisors: Stefan Naumann, Daniel Lohmann
Project: AHA
Bearbeiter: Gabriel Behn
Benchmark Micropython, identify spots to accelerate and propose hardware accelerators for the Micropython interpreter.